Driven by demands from optical I/O, telecommunications, optical computing, and other applications, extensive research is being carried out in the field of integrating III-V semiconductor devices on silicon. Various options have been suggested for integrating electrically pumped lasers and optical amplifiers on a silicon based photonics platforms.
Individual laser dies may be flip chip mounted to a silicon photonics wafer or may be transferred to a silicon platform using an epitaxial lift-off process. Tight mechanical alignment requirements may make this option less attractive for wavelength division multiplexing (WDM) systems, wherein the number of lasers required per chip has increased over the years.
Alternatively, a bonding approach may be used for achieving hybrid integration of III-V semiconductor lasers on a silicon photonics platform (e.g., SOI based) without the need for stringent alignment in the assembly process. Examples of this approach are molecular direct bonding and adhesive bonding. In the molecular direct bonding approach a strong bond between the different wafers/dies is realized by interfacial bonds. Adhesive bonding technology uses a glue, e.g., a polymer or a metal, to realize wafer bonding. In such bonding approaches the alignment between III-V semiconductor structures and silicon structures may be achieved collectively through lithography. Furthermore, many lasers may be fabricated by bonding a single III-V semiconductor die or III-V semiconductor wafer onto the silicon chip, allowing the fabrication of arrays of multi-wavelength lasers integrated with other silicon photonic components suitable for WDM links. However, using a die bonding or wafer bonding approach is relatively expensive.
Besides bonding based integration methods, epitaxial growth of III-V semiconductor layers on silicon recently regained interest for both material science and optical engineering. Despite the large lattice mismatch between silicon and typical III-V semiconductor materials, considerable improvements in both material quality and device performance were achieved through technologies such as lattice-matched growth, the use of a self-organized dislocation network, lateral epitaxial overgrowth and quantum dot epitaxy. However, this approach results in a relatively high fabrication cost due the rather large consumption of expensive III-V semiconductor materials.